diff --git a/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.brd b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.brd
new file mode 100644
index 0000000..fced001
--- /dev/null
+++ b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.brd
@@ -0,0 +1,597 @@
+
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+
+
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+
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+
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+
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+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+Pyr0-Piezo Orion Adapter v1.0.0
+https://docs.pyroballpcbs.com
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>EAGLE Design Rules</b>
+<p>
+Die Standard-Design-Rules sind so gewählt, dass sie für
+die meisten Anwendungen passen. Sollte ihre Platine
+besondere Anforderungen haben, treffen Sie die erforderlichen
+Einstellungen hier und speichern die Design Rules unter
+einem neuen Namen ab.
+<b>EAGLE Design Rules</b>
+<p>
+The default Design Rules have been set to cover
+a wide range of applications. Your particular design
+may have different requirements, so please make the
+necessary adjustments and save your customized
+design rules under a new name.
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+Since Version 8.2, EAGLE supports online libraries. The ids
+of those online libraries will not be understood (or retained)
+with this version.
+
+
+Since Version 8.3, EAGLE supports Fusion synchronisation.
+This feature will not be available in this version and saving
+the document will break the link to the Fusion PCB feature.
+
+
+Since Version 8.3, EAGLE supports URNs for individual library
+assets (packages, symbols, and devices). The URNs of those assets
+will not be understood (or retained) with this version.
+
+
+Since Version 8.3, EAGLE supports the association of 3D packages
+with devices in libraries, schematics, and board files. Those 3D
+packages will not be understood (or retained) with this version.
+
+
+
diff --git a/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.sch b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.sch
new file mode 100644
index 0000000..2ba4c99
--- /dev/null
+++ b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_Orion_Adapter_v1.0.0.sch
@@ -0,0 +1,683 @@
+
+
+
+
+
+
+
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+
+
+
+
+
+
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+
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+
+
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+
+
+
+
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+
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+
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+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Single Row, Vertical, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705430002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Wire-to-Board Header, Low Profile, Surface Mount, Single Row, Right Angle, 3.05mm Pocket, Shrouded, with Press-fit Plastic Peg, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/015913024_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Single Row, Vertical, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705430002_sd.pdf>Datasheet </a>
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+<b>2.54mm Pitch SL™ Wire-to-Board Header, Low Profile, Surface Mount, Single Row, Right Angle, 3.05mm Pocket, Shrouded, with Press-fit Plastic Peg, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/015913024_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>CONNECTOR</b><p>
+wire to board 2.54 mm (0.100") pitch header
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Supply Symbols</b><p>
+ GND, VCC, 0V, +5V, -5V, etc.<p>
+ Please keep in mind, that these devices are necessary for the
+ automatic wiring of the supply signals.<p>
+ The pin name defined in the symbol is identical to the net which is to be wired automatically.<p>
+ In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p>
+ <author>Created by librarian@cadsoft.de</author>
+
+
+
+
+
+>VALUE
+
+
+
+
+
+<b>SUPPLY SYMBOL</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+Since Version 8.2, EAGLE supports online libraries. The ids
+of those online libraries will not be understood (or retained)
+with this version.
+
+
+Since Version 8.3, EAGLE supports URNs for individual library
+assets (packages, symbols, and devices). The URNs of those assets
+will not be understood (or retained) with this version.
+
+
+Since Version 8.3, EAGLE supports the association of 3D packages
+with devices in libraries, schematics, and board files. Those 3D
+packages will not be understood (or retained) with this version.
+
+
+
diff --git a/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.brd b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.brd
new file mode 100644
index 0000000..bb34d48
--- /dev/null
+++ b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.brd
@@ -0,0 +1,586 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.2 mm, round
+
+
+
+
+
+
+
+
+
+3,2
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.2 mm, round
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>EAGLE Design Rules</b>
+<p>
+Die Standard-Design-Rules sind so gewählt, dass sie für
+die meisten Anwendungen passen. Sollte ihre Platine
+besondere Anforderungen haben, treffen Sie die erforderlichen
+Einstellungen hier und speichern die Design Rules unter
+einem neuen Namen ab.
+<b>EAGLE Design Rules</b>
+<p>
+The default Design Rules have been set to cover
+a wide range of applications. Your particular design
+may have different requirements, so please make the
+necessary adjustments and save your customized
+design rules under a new name.
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+Since Version 8.2, EAGLE supports online libraries. The ids
+of those online libraries will not be understood (or retained)
+with this version.
+
+
+Since Version 8.3, EAGLE supports URNs for individual library
+assets (packages, symbols, and devices). The URNs of those assets
+will not be understood (or retained) with this version.
+
+
+Since Version 8.3, EAGLE supports the association of 3D packages
+with devices in libraries, schematics, and board files. Those 3D
+packages will not be understood (or retained) with this version.
+
+
+
diff --git a/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.sch b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.sch
new file mode 100644
index 0000000..9733fb3
--- /dev/null
+++ b/Eagle_Files/PiezoDisk-PCB/Pyr0-Piezo_SingleDisk_Adapter.sch
@@ -0,0 +1,981 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Single Row, Vertical, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705430002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Wire-to-Board Header, Low Profile, Surface Mount, Single Row, Right Angle, 3.05mm Pocket, Shrouded, with Press-fit Plastic Peg, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/015913024_sd.pdf>Datasheet </a>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 2.8 mm, round
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.0 mm, round
+
+
+
+
+
+
+
+
+
+3,0
+
+
+<b>MOUNTING PAD</b> 3.2 mm, round
+
+
+
+
+
+
+
+
+
+3,2
+
+
+<b>MOUNTING PAD</b> 3.3 mm, round
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.6 mm, round
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.1 mm, round
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.3 mm, round
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.5 mm, round
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 5.0 mm, round
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b> 5.5 mm, round
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Single Row, Vertical, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705430002_sd.pdf>Datasheet </a>
+
+
+
+
+
+<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
+
+
+
+
+
+<b>2.54mm Pitch SL™ Wire-to-Board Header, Low Profile, Surface Mount, Single Row, Right Angle, 3.05mm Pocket, Shrouded, with Press-fit Plastic Peg, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/015913024_sd.pdf>Datasheet </a>
+
+
+
+
+
+<b>MOUNTING PAD</b> 2.8 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.0 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.2 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.3 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 3.6 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.1 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.3 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 4.5 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 5.0 mm, round
+
+
+
+
+
+<b>MOUNTING PAD</b> 5.5 mm, round
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>CONNECTOR</b><p>
+wire to board 2.54 mm (0.100") pitch header
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>MOUNTING PAD</b>, round
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Supply Symbols</b><p>
+ GND, VCC, 0V, +5V, -5V, etc.<p>
+ Please keep in mind, that these devices are necessary for the
+ automatic wiring of the supply signals.<p>
+ The pin name defined in the symbol is identical to the net which is to be wired automatically.<p>
+ In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p>
+ <author>Created by librarian@cadsoft.de</author>
+
+
+
+
+
+>VALUE
+
+
+
+
+
+<b>SUPPLY SYMBOL</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+Since Version 8.2, EAGLE supports online libraries. The ids
+of those online libraries will not be understood (or retained)
+with this version.
+
+
+Since Version 8.3, EAGLE supports URNs for individual library
+assets (packages, symbols, and devices). The URNs of those assets
+will not be understood (or retained) with this version.
+
+
+Since Version 8.3, EAGLE supports the association of 3D packages
+with devices in libraries, schematics, and board files. Those 3D
+packages will not be understood (or retained) with this version.
+
+
+