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1B 1A 2A 2B
Pyr0-Piezo FFC Rev.2.0.1
Copyright 2019 Alan "pyr0ball" Weinstock
1B 1A 2A 2B
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+5V ⏚ TXD RXD RST
+5V ⏚ SDA SCL
>NAME
>VALUE
>NAME
<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 5 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530004_sd.pdf>Datasheet </a>
>NAME
>VALUE
<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
>NAME
>VALUE
<b>KK® 396 Header, Vertical, Friction Lock, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/026604020_sd.pdf>Datasheet </a>
>NAME
>VALUE
>NAME
>VALUE
<b>Hyper CHIPLED Hyper-Bright LED</b><p>
LB R99A<br>
Source: http://www.osram.convergy.de/ ... lb_r99a.pdf
>NAME
>VALUE
>NAME
>VALUE
<b>TO 92</b>
>NAME
>VALUE
2
3
1
<b>RESISTOR</b><p>
chip
>NAME
>VALUE
>NAME
>VALUE
Chip, 2.00 X 1.25 X 1.30 mm body
<p>Chip package with body size 2.00 X 1.25 X 1.30 mm</p>
>NAME
>VALUE
<b>MOUNTING PAD</b> 3.2 mm, round
3,2
<b>0.5mm Pitch Connectors For FPC/FFC</b><p>
Source: <a href= "http://www.hirose.co.jp/cataloge_hp/e58605370.pdf">Data sheet</a><p>
>NAME
Single-row, 5-pin Receptacle Header (Female) Straight, 2.54 mm (0.10 in) col pitch, 5.75 mm insulator length, 12.70 X 2.54 X 5.75 mm body
<p>Single-row (1X5), 5-pin Receptacle Header (Female) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.00 mm tail length and 5.75 mm insulator length with overall size 12.70 X 2.54 X 5.75 mm, pin pattern - clockwise from top left</p>
>NAME
Single-row, 4-pin Receptacle Header (Female) Straight, 2.54 mm (0.10 in) col pitch, 5.75 mm insulator length, 10.16 X 2.54 X 5.75 mm body
<p>Single-row (1X4), 4-pin Receptacle Header (Female) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.00 mm tail length and 5.75 mm insulator length with overall size 10.16 X 2.54 X 5.75 mm, pin pattern - clockwise from top left</p>
>NAME
>NAME
>VALUE
<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 5 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530004_sd.pdf>Datasheet </a>
Hyper CHIPLED Hyper-Bright LED
LB R99A
Source: http://www.osram.convergy.de/ ... lb_r99a.pdf
TO 92
<b>RESISTOR</b><p>
chip
Chip, 2.00 X 1.25 X 1.30 mm body
<p>Chip package with body size 2.00 X 1.25 X 1.30 mm</p>
<b>MOUNTING PAD</b> 3.2 mm, round
<b>0.5mm Pitch Connectors For FPC/FFC</b><p>
Source: <a href= "http://www.hirose.co.jp/cataloge_hp/e58605370.pdf">Data sheet</a><p>
<b>2.54mm Pitch SL™ Header, Low Profile, Single Row, Right Angle, 3.05mm Pocket, Shrouded, 3 Circuits, 0.38µm Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/705530002_sd.pdf>Datasheet </a>
<b>KK® 396 Header, Vertical, Friction Lock, 2 Circuits, Tin (Sn) Plating</b><p><a href =http://www.molex.com/pdm_docs/sd/026604020_sd.pdf>Datasheet </a>
Single-row, 5-pin Receptacle Header (Female) Straight, 2.54 mm (0.10 in) col pitch, 5.75 mm insulator length, 12.70 X 2.54 X 5.75 mm body
<p>Single-row (1X5), 5-pin Receptacle Header (Female) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.00 mm tail length and 5.75 mm insulator length with overall size 12.70 X 2.54 X 5.75 mm, pin pattern - clockwise from top left</p>
Single-row, 4-pin Receptacle Header (Female) Straight, 2.54 mm (0.10 in) col pitch, 5.75 mm insulator length, 10.16 X 2.54 X 5.75 mm body
<p>Single-row (1X4), 4-pin Receptacle Header (Female) Straight package with 2.54 mm (0.10 in) col pitch, 0.64 mm lead width, 3.00 mm tail length and 5.75 mm insulator length with overall size 10.16 X 2.54 X 5.75 mm, pin pattern - clockwise from top left</p>
<b>EAGLE Design Rules</b>
<p>
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.
<b>EAGLE Design Rules</b>
<p>
The default Design Rules have been set to cover
a wide range of applications. Your particular design
may have different requirements, so please make the
necessary adjustments and save your customized
design rules under a new name.
Since Version 8.2, EAGLE supports online libraries. The ids
of those online libraries will not be understood (or retained)
with this version.
Since Version 8.3, EAGLE supports Fusion synchronisation.
This feature will not be available in this version and saving
the document will break the link to the Fusion PCB feature.
Since Version 8.3, EAGLE supports URNs for individual library
assets (packages, symbols, and devices). The URNs of those assets
will not be understood (or retained) with this version.
Since Version 8.3, EAGLE supports the association of 3D packages
with devices in libraries, schematics, and board files. Those 3D
packages will not be understood (or retained) with this version.