- Add hardware/ directory structure (cad, cam, parts, sim, docs) - Add hardware/bom/merlin-bci-rev0.csv — ADS1299 + ESP32-WROOM-32E full BOM with passive values for 8-ch EEG front-end, isolated ±5V supply, WiFi streaming - Fix: wire gaze_est.estimate(face) into camera loop (was instantiated but never called) - Fix: add fist, gaze_left/right/up/down to DEFAULT_MAPPINGS - Add: ActionExecutor.backend property (replace _backend direct access in /status) - Add: scroll_left/right, key_ctrl_z/c/v to xdotool + pyautogui backends
126 lines
7.3 KiB
Text
126 lines
7.3 KiB
Text
RefDes,Qty,Value / MPN,Package,Description,Notes
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U1,1,ADS1299IPAGR,TQFP-64,8-ch 24-bit delta-sigma EEG/ECG ADC,"TI; DVDD 1.8–3.6V, AVDD ±(2.5–5.25V)"
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U2,1,ESP32-WROOM-32E (4MB),SMD module (18×25.5mm),"Dual-core 240MHz, WiFi+BT MCU","brainflow CUSTOM_BOARD via WiFi; or use devkit during firmware dev"
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U3,1,MGJ2D121505SC,12-SMD SIP,"Isolated DC/DC 5V in → ±5V out, 2W","Murata; patient isolation barrier for AVDD/AVSS supply"
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U4,1,REF3325AIDBZR,SOT-23-5,"2.5V precision ref/LDO, 50ppm/°C","TI; AVDD rail (patient side)"
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U5,1,TPS60403DBVR,SOT-23-5,"Inverting charge pump −2.5V (AVSS)","TI; no inductor; in from isolated +5V"
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U6,1,TLV1117-33DCYR,SOT-223,"3.3V 800mA LDO for DVDD + MCU","Input from isolated +5V rail"
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Y1,1,2.048MHz ±50ppm,3225 4-pad SMD,"Crystal for ADS1299 CLK","Ties to CLK pin; CLKSEL → DVDD"
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C_CLK1,1,12pF C0G 0402,0402,Crystal load cap X1,Match to crystal spec (typically 8–18pF)
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C_CLK2,1,12pF C0G 0402,0402,Crystal load cap X2,
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R_IN1,1,10kΩ 1% 0402,0402,IN1P input series protection,
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R_IN2,1,10kΩ 1% 0402,0402,IN1N input series protection,
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R_IN3,1,10kΩ 1% 0402,0402,IN2P input series protection,
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R_IN4,1,10kΩ 1% 0402,0402,IN2N input series protection,
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R_IN5,1,10kΩ 1% 0402,0402,IN3P input series protection,
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R_IN6,1,10kΩ 1% 0402,0402,IN3N input series protection,
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R_IN7,1,10kΩ 1% 0402,0402,IN4P input series protection,
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R_IN8,1,10kΩ 1% 0402,0402,IN4N input series protection,
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R_IN9,1,10kΩ 1% 0402,0402,IN5P input series protection,
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R_IN10,1,10kΩ 1% 0402,0402,IN5N input series protection,
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R_IN11,1,10kΩ 1% 0402,0402,IN6P input series protection,
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R_IN12,1,10kΩ 1% 0402,0402,IN6N input series protection,
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R_IN13,1,10kΩ 1% 0402,0402,IN7P input series protection,
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R_IN14,1,10kΩ 1% 0402,0402,IN7N input series protection,
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R_IN15,1,10kΩ 1% 0402,0402,IN8P input series protection,
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R_IN16,1,10kΩ 1% 0402,0402,IN8N input series protection,
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C_AC1,1,10µF X5R 0402,0402,"AC coupling / HPF ch1P (fc ≈ 1.6Hz @ 10kΩ)","Between R_IN and ADS1299 pin"
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C_AC2,1,10µF X5R 0402,0402,AC coupling / HPF ch1N,
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C_AC3,1,10µF X5R 0402,0402,AC coupling / HPF ch2P,
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C_AC4,1,10µF X5R 0402,0402,AC coupling / HPF ch2N,
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C_AC5,1,10µF X5R 0402,0402,AC coupling / HPF ch3P,
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C_AC6,1,10µF X5R 0402,0402,AC coupling / HPF ch3N,
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C_AC7,1,10µF X5R 0402,0402,AC coupling / HPF ch4P,
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C_AC8,1,10µF X5R 0402,0402,AC coupling / HPF ch4N,
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C_AC9,1,10µF X5R 0402,0402,AC coupling / HPF ch5P,
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C_AC10,1,10µF X5R 0402,0402,AC coupling / HPF ch5N,
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C_AC11,1,10µF X5R 0402,0402,AC coupling / HPF ch6P,
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C_AC12,1,10µF X5R 0402,0402,AC coupling / HPF ch6N,
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C_AC13,1,10µF X5R 0402,0402,AC coupling / HPF ch7P,
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C_AC14,1,10µF X5R 0402,0402,AC coupling / HPF ch7N,
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C_AC15,1,10µF X5R 0402,0402,AC coupling / HPF ch8P,
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C_AC16,1,10µF X5R 0402,0402,AC coupling / HPF ch8N,
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C_EMI1,1,4.7nF C0G 0402,0402,EMI shunt ch1P to AGND,
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C_EMI2,1,4.7nF C0G 0402,0402,EMI shunt ch1N to AGND,
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C_EMI3,1,4.7nF C0G 0402,0402,EMI shunt ch2P to AGND,
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C_EMI4,1,4.7nF C0G 0402,0402,EMI shunt ch2N to AGND,
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C_EMI5,1,4.7nF C0G 0402,0402,EMI shunt ch3P to AGND,
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C_EMI6,1,4.7nF C0G 0402,0402,EMI shunt ch3N to AGND,
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C_EMI7,1,4.7nF C0G 0402,0402,EMI shunt ch4P to AGND,
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C_EMI8,1,4.7nF C0G 0402,0402,EMI shunt ch4N to AGND,
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C_EMI9,1,4.7nF C0G 0402,0402,EMI shunt ch5P to AGND,
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C_EMI10,1,4.7nF C0G 0402,0402,EMI shunt ch5N to AGND,
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C_EMI11,1,4.7nF C0G 0402,0402,EMI shunt ch6P to AGND,
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C_EMI12,1,4.7nF C0G 0402,0402,EMI shunt ch6N to AGND,
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C_EMI13,1,4.7nF C0G 0402,0402,EMI shunt ch7P to AGND,
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C_EMI14,1,4.7nF C0G 0402,0402,EMI shunt ch7N to AGND,
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C_EMI15,1,4.7nF C0G 0402,0402,EMI shunt ch8P to AGND,
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C_EMI16,1,4.7nF C0G 0402,0402,EMI shunt ch8N to AGND,
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D1,1,BAV99,SOT-23,"Dual Schottky clamp ch1 (INP+INN to AVDD/AVSS)","1 BAV99 = 2 diodes; clamp one diff pair"
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D2,1,BAV99,SOT-23,Dual Schottky clamp ch2,
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D3,1,BAV99,SOT-23,Dual Schottky clamp ch3,
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D4,1,BAV99,SOT-23,Dual Schottky clamp ch4,
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D5,1,BAV99,SOT-23,Dual Schottky clamp ch5,
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D6,1,BAV99,SOT-23,Dual Schottky clamp ch6,
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D7,1,BAV99,SOT-23,Dual Schottky clamp ch7,
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D8,1,BAV99,SOT-23,Dual Schottky clamp ch8,
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R_BIAS1,1,820kΩ 1% 0402,0402,Input bias ch1P (BIASIN network to BIASOUT),
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R_BIAS2,1,820kΩ 1% 0402,0402,Input bias ch1N,
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R_BIAS3,1,820kΩ 1% 0402,0402,Input bias ch2P,
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R_BIAS4,1,820kΩ 1% 0402,0402,Input bias ch2N,
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R_BIAS5,1,820kΩ 1% 0402,0402,Input bias ch3P,
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R_BIAS6,1,820kΩ 1% 0402,0402,Input bias ch3N,
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R_BIAS7,1,820kΩ 1% 0402,0402,Input bias ch4P,
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R_BIAS8,1,820kΩ 1% 0402,0402,Input bias ch4N,
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R_BIAS9,1,820kΩ 1% 0402,0402,Input bias ch5P,
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R_BIAS10,1,820kΩ 1% 0402,0402,Input bias ch5N,
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R_BIAS11,1,820kΩ 1% 0402,0402,Input bias ch6P,
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R_BIAS12,1,820kΩ 1% 0402,0402,Input bias ch6N,
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R_BIAS13,1,820kΩ 1% 0402,0402,Input bias ch7P,
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R_BIAS14,1,820kΩ 1% 0402,0402,Input bias ch7N,
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R_BIAS15,1,820kΩ 1% 0402,0402,Input bias ch8P,
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R_BIAS16,1,820kΩ 1% 0402,0402,Input bias ch8N,
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R_DRL1,1,1MΩ 1% 0402,0402,DRL feedback resistor (RLDFB),
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R_DRL2,1,680Ω 1% 0402,0402,DRL output protection,
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C_DRL1,1,4.7nF C0G 0402,0402,DRL loop stability capacitor,In parallel with R_DRL1
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C_VREFP1,1,10µF X5R 6.3V 0805,0805,VREFP bulk bypass,
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C_VREFP2,1,100nF C0G 0402,0402,VREFP HF bypass,
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C_AVDD1,1,10µF X5R 10V 0805,0805,AVDD bulk bypass #1,
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C_AVDD2,1,10µF X5R 10V 0805,0805,AVDD bulk bypass #2,
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C_AVDD3,1,100nF C0G 0402,0402,AVDD HF bypass #1,
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C_AVDD4,1,100nF C0G 0402,0402,AVDD HF bypass #2,
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C_AVDD5,1,100nF C0G 0402,0402,AVDD HF bypass #3,
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C_AVSS1,1,10µF X5R 10V 0805,0805,AVSS bulk bypass #1 (to AGND),
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C_AVSS2,1,10µF X5R 10V 0805,0805,AVSS bulk bypass #2,
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C_AVSS3,1,100nF C0G 0402,0402,AVSS HF bypass #1,
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C_AVSS4,1,100nF C0G 0402,0402,AVSS HF bypass #2,
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C_AVSS5,1,100nF C0G 0402,0402,AVSS HF bypass #3,
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C_DVDD1,1,100nF C0G 0402,0402,DVDD bypass pin 1,
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C_DVDD2,1,100nF C0G 0402,0402,DVDD bypass pin 2,
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C_DVDD3,1,100nF C0G 0402,0402,DVDD bypass pin 3,
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C_DVDD4,1,10µF X5R 0805,0805,DVDD bulk bypass,
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R_SPI1,1,33Ω 0402,0402,SPI MOSI series termination,MCU side of trace
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R_SPI2,1,33Ω 0402,0402,SPI MISO series termination,
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R_SPI3,1,33Ω 0402,0402,SPI SCLK series termination,
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R_SPI4,1,33Ω 0402,0402,SPI CS series termination,
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R_DRDY,1,1kΩ 0402,0402,DRDY pull-up to DVDD,
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C_DRDY,1,100pF C0G 0402,0402,DRDY glitch filter,
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R_PU1,1,10kΩ 0402,0402,RESET pull-up to DVDD,
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R_PU2,1,10kΩ 0402,0402,START pull-up to DVDD,
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R_PU3,1,10kΩ 0402,0402,PWDN pull-up to DVDD,
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R_PU4,1,10kΩ 0402,0402,CLKSEL tie to DVDD (ext crystal mode),"Can use 0Ω; 10kΩ keeps GPIO optional"
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C_MCU1,1,100nF X5R 0402,0402,ESP32 VDDA bypass,
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C_MCU2,1,100nF X5R 0402,0402,ESP32 3V3 bypass #1,
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C_MCU3,1,100nF X5R 0402,0402,ESP32 3V3 bypass #2,
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C_MCU4,1,100nF X5R 0402,0402,ESP32 3V3 bypass #3,
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C_MCU5,1,10µF X5R 0805,0805,ESP32 3V3 bulk bypass,
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C_ISO1,1,10µF X5R 10V 0805,0805,Isolated +5V rail bulk cap,After MGJ2D121505SC output
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C_ISO2,1,100nF C0G 0402,0402,Isolated +5V HF bypass,
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C_ISO3,1,10µF X5R 10V 0805,0805,Isolated −5V rail bulk cap,
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C_ISO4,1,100nF C0G 0402,0402,Isolated −5V HF bypass,
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J1,1,USB4085-GF-A,USB-C mid-mount SMD,USB-C connector to host,"GCT; data carried wirelessly (WiFi); USB only for firmware flash"
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J2,1,3.5mm TRRS × 9,TH or panel mount,"Electrode jacks: 8 channels + DRL ref","Or Touchproof Ag/AgCl snap connector header"
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J3,1,2×5 2.54mm header,TH,SWD/JTAG debug header for ESP32,Optional
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J4,1,2×2 2.54mm header,TH,BOOT / EN jumpers for ESP32 flash mode,
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FB1,1,600Ω @ 100MHz 0805,0805,Ferrite bead on DVDD supply,Isolate digital noise from analog rails
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FB2,1,600Ω @ 100MHz 0805,0805,Ferrite bead on AGND bridge to DGND,Star-ground point; single-point bond
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